1. Field of the Invention
The present invention relates to a structure for coupling integrated circuit packages to a substrate.
2. Prior Art
In recent years integrated circuits of increasing complexity have become commercially available in large quantities with the costs of such circuits in the unpackaged chip form becoming lower and lower. Unfortunately, this has lead to poor quality control and inaccurate positioning of the package on the substrate. Moreover, because of the requirements that each package have a specific capability, a plurality of tasks must be performed on each package in order to assure that such package has the proper characteristics.
Packaging of semiconductor devices involves the handling and processing of individual integrated circuits after dicing. Thus, each circuit must be handled individually, each must be accurately located with respect to the package, each of the required contexts or connections between the chip and the package leads must be made, and the package must be satisfactorily sealed against moisture and other contaminants. Accordingly, it is not unusual for the costs of such packages to be in the order of the cost of semiconductor device to be packaged therein, and in many cases it is even greater than the device to be packaged.
Packages of the type commonly referred to as plastic flat packs have come into wide-spread use, particularly in commercial applications. Such packages are characterized by a generally rectangular, relatively thin plastic body with a plurality of leads projecting out of each side and then downward so that the device may be either plugged into a cooperatively disposed socket for such a device, or soldered directly into a printed socket board adapted to receive the device. The plastic packages of the prior art generally dispose the top surface of a semiconductor chip below the plane of the top surface of the spider conductors, so that both the semiconductor surface and the lead frame surface cannot be maintained in focus under a microscope at the same time, and coupling of the wires are longer than necessary. In addition, fabrication and assembly are more difficult in these prior art packages and time consuming.
The prior art method of packaging integrated circuits, in which an integrated circuit chip is first bonded directly to a lead frame etched over a plastic film opening and then packaged, generally entails (i) placing the package inside the opening, (ii) etching away the lead frame inside the opening, and (iii) fixing the lead frame directly to the circuit base. After the package is cut away from the plastic film and fixed to the circuit base, the package is held only by the thin lead frame made of thin layers of metal. For this reason, the lead frame cannot provide sufficient support for the package which is led to bends or breaking off of the leads adding to the difficulty of packaging operations inside the opening. In addition, prior art packaging structures provide no means for positioning or securing the package to the circuit base or substrate.